vsr
Vector Shift Right
vsr vD, vA, vB
Shifts vector right by octet count in vB.
Encoding
Binary Layout
4
0:5
vD
6:10
vA
11:15
vB
16:20
708
21:31
Operands
-
vD
Target -
vA
Data -
vB
Shift Count
Example
vsr vd, va, vb
Related
More in VMX (AltiVec)
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
Shifts the 128-bit value in vA right by the number of octets (bytes) specified in the low 5 bits of vB, filling vacated positions on the left with zeros. The shift amount is taken from bits 123-127 of vB (the low-order 5 bits). No condition register fields are affected.
Operation
shift_count ← vB[123:127]
if shift_count > 16 then shift_count ← 16
vD ← vA >> (shift_count * 8)
Programming Note
The vsr instruction is commonly used for bit manipulation in vector operations, where each element of the vector is shifted right by a number of bits specified in a control register. Ensure that the control register contains valid shift amounts to avoid unexpected results. This operation does not require any specific privilege level and will not generate exceptions unless there are alignment issues with the vector data.