vsrw

Vector Shift Right Word

vsrw vD, vA, vB

Shifts each word element of the source vector right by a specified number of bits.

Details

For vsrw, each word element of VSR[VRA+32] is shifted right by the number of bits specified in the low-order 5 bits of the corresponding word element of VSR[VRB+32]. The result is placed into the corresponding word element of VSR[VRT+32].

Pseudocode Operation

if MSR.VEC=0 then
    Vector_Unavailable()
do i = 0 to 3
    src1 ← VSR[VRA+32].word[i]
    src2 ← VSR[VRB+32].word[i].bit[27:31]
    VSR[VRT+32].word[i] ← CHOP32(EXTZ(src1) >> src2)
end

Programming Note

The vsrw instruction shifts each word element of the source vector right by a specified number of bits, determined by the corresponding word element in another vector. Ensure that the shift amount is within the range of 0 to 31 to avoid undefined behavior. This instruction requires the Vector Facility to be enabled; otherwise, it will raise an exception.

Example

vsrw vd, va, vb

Encoding

Binary Layout
4
0
vD
6
vA
11
vB
16
644
 
Format VX-form
Opcode 0x10000284
Extension VMX (AltiVec)
Registers Altered MSR

Operands

  • vD
    Target
  • vA
    Data
  • vB
    Shift
  • VRT
    Target Vector Register
  • VRA
    Source Vector Register
  • VRB
    Source Vector Register