dcbtls

Data Cache Block Touch and Lock Set

dcbtls CT, RA, RB

Locks a cache line in the L1 cache.

Details

Locks a data cache line in the L1 data cache at the address computed from RA+RB. The cache target (CT) field specifies the cache level and operation type. This is a privileged instruction that provides cache locking hints to the processor and does not modify any general-purpose registers or condition flags.

Pseudocode Operation

EA ← (RA|0) + RB
Lock cache line at EA in L1 data cache based on CT

Example

dcbtls 0, r4, r5

Encoding

Binary Layout
31
0
CT
6
RA
11
RB
16
166
21
/
31
 
Format X-form
Opcode 0x7C00014C
Extension Privileged

Operands

  • CT
    Cache Target
  • RA
    Base
  • RB
    Index