psth

Prefixed Store Halfword

psth RS, D(RA), R

Stores halfword using 34-bit offset.

Details

The Prefixed Store Halfword (pstb) instruction stores the lower half of a doubleword from register RS into memory at an effective address calculated using registers RA and RB. The effective address is determined by adding the contents of RA to RB, with special handling if RA is zero.

Pseudocode Operation

if RA = 0 then
    b ← 0
else
    b ← (RA)
EA ← b + (RB)
MEM(EA, 2) ← (RS)56:63

Programming Note

The psth instruction is used to store the lower half of a doubleword from register RS into memory. It's important to ensure that RA and RB are correctly set to calculate the effective address. If RA is zero, the base address is considered as zero. This instruction operates at user privilege level and can raise an exception if there's a memory access violation.

Example

psth r3, 0(r4), 0

Encoding

Binary Layout
1
0
2
6
R
8
0
9
D0
14
44
32
RS
38
RA
43
D1
48
 
Format MLS:D-form
Opcode 0x06000000
Extension Prefixed

Operands

  • RS
    Source
  • D
    Offset
  • RA
    Base
  • R
    PC-Rel