xvmindp

VSX Vector Minimum Double-Precision

xvmindp XT, XA, XB

Compares two double-precision floating-point values and selects the minimum value for each element.

Encoding

Binary Layout
111100
0:5
XA
6:8
XT
9:10
000000
11:15
000000
16:20
000000
21:28
000000
29
000000
30
000000
31
 
Format XX3-form
Opcode 0xF0000740
Extension VSX

Operands

  • XT
    Target
  • XA
    Src A
  • XB
    Src B

Example

xvmindp vs1, vs2, vs3

Registers Altered

FPSCR (FX, VXSNAN)

Related

More in VSX

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

VSX Vector Minimum Double-Precision compares two double-precision floating-point elements from VSX registers XA and XB element-wise, selecting the minimum value for each element and storing results in VSX register XT. This VSX category instruction processes two 64-bit elements in parallel and follows IEEE 754 minimum semantics.

Operation

XT[0:63] ← min(XA[0:63], XB[0:63])
XT[64:127] ← min(XA[64:127], XB[64:127])

Programming Note

The xvmindp instruction is used to perform element-wise minimum comparison of double-precision floating-point values in VSX registers. Ensure that the input vectors are properly aligned and that the FPSCR register is correctly configured to handle exceptions like NaNs or infinities. This instruction operates at a privilege level that allows access to VSX registers, typically requiring supervisor or higher privileges.