xvmindp

VSX Vector Minimum Double-Precision

xvmindp XT, XA, XB

Compares two double-precision floating-point values and selects the minimum value for each element.

Details

The xvmindp instruction compares the double-precision floating-point values in elements i of VSR[XA] and VSR[XT], where i is either 0 or 1, and places the lesser value into element i of VSR[XT].

Pseudocode Operation

for i in {0, 1} do
    src1 <- VSR[XA][i]
    src2 <- VSR[XT][i]
    if Q(src1) or Q(src2) then
        T(Q(src2))
    else if SNaN(src1) or SNaN(src2) then
        fx(VXSNAN)
    else if src1 == -Infinity and src2 == +Zero then
        T(-NZF)
    else if src1 == +Zero and src2 == -Zero then
        T(+NZF)
    else if src1 == +Infinity or src2 == +Infinity then
        T(+Infinity)
    else if src1 == -Infinity or src2 == -Infinity then
        T(-Infinity)
    else if src1 == QNaN or src2 == QNaN then
        T(Q(src2))
    else if src1 == SNaN or src2 == SNaN then
        fx(VXSNAN)
    else if src1 < src2 then
        T(src1)
    else
        T(src2)
end for

Programming Note

The xvmindp instruction is used to perform element-wise minimum comparison of double-precision floating-point values in VSX registers. Ensure that the input vectors are properly aligned and that the FPSCR register is correctly configured to handle exceptions like NaNs or infinities. This instruction operates at a privilege level that allows access to VSX registers, typically requiring supervisor or higher privileges.

Example

xvmindp vs1, vs2, vs3

Encoding

Binary Layout
111100
0
XA
6
XT
11
000000
16
000000
21
000000
29
000000
30
000000
31
000000
 
Format XX3-form
Opcode 0xF00000E8
Extension VSX
Registers Altered FPSCR (FX, VXSNAN)

Operands

  • XT
    Target
  • XA
    Src A
  • XB
    Src B