add

Add

add RT, RA, RB

Adds the contents of two registers and places the result in a third register.

Details

Adds the values in registers RA and RB and places the result in RT. If OE=1, sets XER[SO] and XER[OV] on signed overflow. If Rc=1, updates CR0 to reflect the result (LT, GT, EQ, SO). No exception is raised on overflow unless OE=1.

Pseudocode Operation

RT ← RA + RB
if OE = 1 then
  if overflow then XER[OV] ← 1; XER[SO] ← 1
if Rc = 1 then
  CR0 ← (RT < 0) || (RT > 0) || (RT = 0) || XER[SO]

Programming Note

add, add., and subf are the preferred instructions...

Example

add r3, r4, r5

// r3 = r4 + r5

Encoding

Binary Layout
31
0
RT
6
RA
30
RB
31
OE
266
Rc
 
Format XO-form
Opcode 0x7C000214
Extension Base
Registers Altered CR0, XER

Operands

  • RT
    Target Register
  • RA
    Source Register 1
  • RB
    Source Register 2
  • rPX
    Destination General Purpose Register
  • rPS
    Source General Purpose Register
  • rNS
    Source General Purpose Register