xsmaxdp

Vector Scalar Maximum Double-Precision Floating-Point

xsmaxdp XT, XA, XB

Compares the doubleword elements of two vector scalar registers and stores the maximum value in another vector scalar register.

Details

Compares the double-precision floating-point value in XA with the value in XB and stores the maximum (or quiet NaN if either operand is NaN) in XT. Following IEEE 754 semantics, quiet NaNs propagate, and negative zero is considered less than positive zero. FPSCR is updated with the comparison result flags.

Pseudocode Operation

result ← DPFP_maximum(XA[0:63], XB[0:63])
XT[0:63] ← result
FPSCR ← update_fpscr(FPSCR, result)

Programming Note

This instruction can be used to operate on single-precision source operands. Previous versions of the architecture allowed the contents of doubleword 1 of the result register to be undefined. However, all processors that support this instruction write 0s into doubleword 1 of the result register, as is required by this version of the architecture.

Example

xsmaxdp vs1, vs2, vs3

Encoding

Binary Layout
60
0
XT
6
XA
11
XB
16
160
21
 
Format XX3-form
Opcode 0xF0000500
Extension VSX
Registers Altered FPSCR, VXSNAN

Operands

  • XT
    Target
  • XA
    Src A
  • XB
    Src B