vminuw

Vector Minimum Unsigned Word

vminuw vD, vA, vB

Selects minimum value per word (unsigned).

Encoding

Binary Layout

4

0:5

vD

6:10

vA

11:15

vB

16:20

1154

21:31

 

Format VA-form

Opcode 0x10000282

Extension VMX (AltiVec)

Operands

• vD
  Target
• vA
  Src A
• vB
  Src B

Example

vminuw vd, va, vb

Registers Altered

MSR

Related

More in VMX (AltiVec)

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Selects the minimum unsigned value for each corresponding word pair from vA and vB, storing the results in vD. This is a vector operation that performs 4 independent word-wise minimum comparisons in parallel. No condition flags or status fields are affected.

Operation

for i in 0 to 3 do
  vD[32*i:32*i+31] ← MIN_UNSIGNED(vA[32*i:32*i+31], vB[32*i:32*i+31])
end for

Programming Note

The vminuw instruction is used to perform element-wise minimum operations on unsigned words from two vectors. Ensure that the Vector Facility (MSR.VEC) is enabled before using this instruction; otherwise, a Vector_Unavailable exception will be raised. The operation is performed in parallel across four elements per vector register.