vmaxfp
Vector Maximum Floating-Point
vmaxfp VRT,VRA,VRB
Performs element-wise maximum of two vector registers and stores the result in a third vector register.
Encoding
Binary Layout
4
0:5
VRT
6:10
VRA
11:15
VRB
16:31
Operands
-
VRT
Target Vector Register -
VRA
Source Vector Register -
VRB
Source Vector Register
Example
vmaxfp v1, v2, v3
Related
More in VMX (AltiVec)
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
For vmaxfp, for each integer value i from 0 to 3, the single-precision floating-point values in word elements i of VSR[VRA+32] and VSR[VRB+32] are compared. The larger of the two values is placed into word element i of VSR[VRT+32].
Operation
if MSR.VEC=0 then
Vector_Unavailable()
do i = 0 to 3
src1 ← VSR[VRA+32].word[i]
src2 ← VSR[VRB+32].word[i]
VSR[VRT+32].word[i] ← bfp32_MAXIMUM(src1,src2)
end
Programming Note
The vmaxfp instruction is used to perform element-wise maximum comparison of single-precision floating-point values in vector registers. Ensure that the Vector Facility (MSR.VEC) is enabled before using this instruction; otherwise, a Vector_Unavailable exception will be raised. This instruction operates on 4 elements per vector register and requires proper alignment of the input vectors for accurate results.