vextublx

Vector Extract Unsigned Byte to GPR using GPR-specified Left-Index VX-form

vextublx RT,RA,VRB

Extracts an unsigned byte from a vector register and places it into a general-purpose register using the left-index specified in another general-purpose register.

Encoding

Binary Layout

0:5

6:10

11:15

VRB

16:31

Format VX-form

Opcode 0x1000060D

Extension VMX (AltiVec)

Operands

RT
Target General Purpose Register
RA
Source General Purpose Register containing the index
VRB
Vector Register B
VRT
Target Vector Register
RB
Source Vector Register

Example

vextublx r3, r4, v3

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

The contents of byte element index of VSR[VRB+32] are placed into bits 56:63 of GPR[RT], where index is the contents of bits 60:63 of GPR[RA]. The contents of bits 0:55 of GPR[RT] are set to 0.

Operation

if MSR.VEC=0 then
    Vector_Unavailable()
index ← GPR[RA].bit[60:63]
GPR[RT] ← EXTZ64(VSR[VRB+32].byte[index])
// The contents of bits 0:55 of GPR[RT] are set to 0.

Programming Note

This instruction extracts an unsigned byte from a vector register and places it into the upper 8 bits of a general-purpose register, zeroing out the lower 56 bits. Ensure that the index in GPR[RA] is within bounds (0-15) to avoid undefined behavior. This operation requires the Vector Facility to be enabled; otherwise, a Vector Unavailable exception will occur.