vextracthm

Vector Extract Halfword Mask

vextracthm RA, vB

Extracts MSB of each halfword into a GPR mask.

Encoding

Binary Layout

4

0:5

RA

6:10

0

11:15

vB

16:20

1666

21:31

 

Format VX-form

Opcode 0x10090642

Extension VMX (AltiVec)

Operands

• RA
  Target
• vB
  Source

Example

vextracthm r4, vb

Registers Altered

MSR

Related

More in VMX (AltiVec)

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Extracts the most significant bit from each halfword element in the source vector and packs these bits into a general-purpose register as a mask. This is a VMX instruction with no effect on condition registers or status fields.

Operation

result ← 0
for i in 0 to 7 do
  if vB[i*16] = 1 then
    result[i] ← 1
  else
    result[i] ← 0
  end if
end for
RA ← result

Programming Note

The vextracthm instruction is useful for extracting the least significant bit of each halfword from a vector register and placing them into a general-purpose register. Ensure that the Vector Facility (MSR.VEC) is enabled before using this instruction; otherwise, it will raise an exception. The upper 16 bits of the destination GPR will contain the extracted bits, with the lower 48 bits set to zero.