vexpandwm
Vector Expand Word Mask
Expands bits from a GPR mask into a word-element vector.
Details
For vexpandwm, each word element of VSR[VRT+32] is set to all 0s or all 1s based on the value of bit 0 of the corresponding word element in VSR[VRB+32].
Pseudocode Operation
Programming Note
The vexpandwm instruction sets each word in the destination vector to all 1s or all 0s based on the least significant bit of the corresponding word in the source vector. Ensure that the Vector Facility is enabled by checking and setting the VEC bit in the MSR register. This instruction operates on 32-bit words, so ensure proper alignment if manipulating data directly. The operation is performed on vectors, so verify that the input vectors are correctly loaded before execution.
Example
Encoding
Operands
-
vD
Target -
vB
Source -
VRT
Target Vector Register -
VRB
Source Vector Register