xsmaddmsp

VSX Scalar Multiply-Add Type-M Single-Precision

xsmaddmsp FRT,FRB,FRC

Multiplies two single-precision floating-point values and adds a third, storing the result in the target register (Type-M form).

Encoding

Binary Layout

111100

0:5

FRT

6:10

FRB

11:15

FRC

16:20

00001

21:30

001

31

 

Format XX3-form

Opcode 0xF0000048

Extension VSX

Operands

• FRT
  Target Floating Point Register
• FRB
  Source Floating Point Register
• FRC
  Source Floating Point Register

Example

xsmaddmsp f1, f3, f4

Registers Altered

FPSCR

Related

More in VSX

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Performs a scalar single-precision floating-point multiply-add operation (Type-M form) using VSX registers, computing FRB × FRC + FRT and storing the result in FRT. The Type-M form provides additional semantics for rounding and exception handling in VSX scalar operations.

Operation

FRT ← FRT + (FRB × FRC)

Programming Note

The xsmaddmsp instruction is commonly used for efficient scalar floating-point arithmetic operations, particularly in applications requiring high performance and precision. Ensure that the input registers are properly aligned to avoid potential exceptions. This instruction operates at a privilege level that allows it to be executed by user-mode programs, making it accessible for general-purpose computations. Be aware of the FPSCR register's impact on rounding modes and exception flags.