xsnmaddadp
VSX Scalar Negative Multiply-Add Double-Precision Type-A
Performs a negative multiply-add operation on double-precision floating-point values.
Details
For xsnmaddadp, the value in VSR[XA] is multiplied by the value in VSR[XB], and then the result is added to the value in VSR[XT]. The final result is negated and stored back into VSR[XT].
Pseudocode Operation
if MSR.VSX=0 then VSX_Unavailable()
reset_xflags()
src1 ←bfp_CONVERT_FROM_BFP64(VSR[32×AX+A].dword[0])
src2 ←bfp_CONVERT_FROM_BFP64(VSR[32×TX+T].dword[0])
src3 ←bfp_CONVERT_FROM_BFP64(VSR[32×BX+B].dword[0])
v ←bfp_MULTIPLY_ADD(src1, src3, src2)
rnd ←bfp_NEGATE(bfp_ROUND_TO_BFP64(0b0, FPSCR.RN, v))
result ←bfp64_CONVERT_FROM_BFP(rnd)
if vxsnan_flag=1 then SetFX(FPSCR.VXSNAN)
if vximz_flag=1 then SetFX(FPSCR.VXIMZ)
if vxisi_flag=1 then SetFX(FPSCR.VXISI)
if ox_flag=1 then SetFX(FPSCR.OX)
if ux_flag=1 then SetFX(FPSCR.UX)
if xx_flag=1 then SetFX(FPSCR.XX)
vx_flag ←vxsnan_flag | vximz_flag | vxisi_flag
vex_flag ←FPSCR.VE & vx_flag
if vex_flag=0 then do
VSR[32×TX+T].dword[1] ←0x0000_0000_0000_0000
FPSCR.FPRF ←fprf_CLASS_BFP32(result)
FPSCR.FI ←xx_flag
else do
FPSCR.FR ←0b0
FPSCR.FI ←0b0
end
VSR[32×TX+T].dword[0] ←result
Programming Note
This instruction is commonly used in applications requiring precise floating-point arithmetic, such as scientific computations and financial calculations. Ensure that the VSX (Vector Scalar Extensions) are enabled by checking the MSR.VSX bit; otherwise, handle the VSX_Unavailable exception. Be cautious of potential exceptions like VXSNAN, VXIMZ, Vxisi, OX, UX, and XX, which can alter the FPSCR flags and affect program flow. The instruction operates on double-precision floating-point numbers and requires proper alignment of the input registers.
Example
Encoding
Operands
-
XT
Target Vector-Scalar Register -
XA
Source Vector-Scalar Register -
XB
Source Vector-Scalar Register