mullw

Multiply Low Word

mullw RT, RA, RB

Multiplies two 32-bit integers and stores the lower 32 bits of the 64-bit result.

Encoding

Binary Layout

31

0:5

RT

6:10

RA

11:15

RB

16:20

OE

21

235

22:30

Rc

31

 

Format XO-form

Opcode 0x7C0001D6

Extension Base

Operands

• RT
  Target
• RA
  Src 1
• RB
  Src 2

Example

mullw r3, r4, r5

// 32-bit multiply.

Registers Altered

CR0

Related

Across architectures

Integer Multiply : how x86, ARM, RISC-V, and PowerISA each do this.

More in Base

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Multiplies the contents of RA and RB as signed 32-bit integers and stores the lower 32 bits of the 64-bit result in RT. If OE=1, sets OV and SO in XER if the result overflows (i.e., if the upper 32 bits of the 64-bit product differ from the sign extension of bits 0-31). If Rc=1, updates CR0 based on the result.

Operation

product ← (RA) ×signed (RB)
RT ← product[32:63]
if OE = 1 then
  OV ← (product[0:31] ≠ sign_extend(product[32:63]))
  SO ← SO | OV
if Rc = 1 then
  CR0 ← (RT < 0) || (RT > 0) || (RT = 0) || SO

Programming Note

When Rc=1 (dot form), CR0 is updated with the signed comparison of the result against zero (LT, GT, EQ) and the current SO bit from XER.