nmachhws
Negative Multiply Accumulate High Halfword Signed
nmachhws RT, RA, RB
Negate product of high halfwords and add to accumulator (Signed Saturation).
Encoding
Binary Layout
4
0:5
RT
6:10
RA
11:15
RB
16:20
110
21:30
0
31
Operands
-
RT
Acc/Dest -
RA
Src A -
RB
Src B
Example
nmachhws r3, r4, r5
Related
More in Embedded
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
Multiplies the high halfwords (bits 0-15) of RA and RB as signed 16-bit integers, negates the 32-bit product, and adds it to RT with signed saturation, storing the result in RT. This is an embedded SPE instruction that performs signed halfword multiply-accumulate with negation and saturation. The overflow and saturation bits (XER[OV] and XER[SAT]) are set appropriately.
Operation
prod ← EXTS((RA[0:15]) * (RB[0:15]))
result ← RT + (-prod)
if result > 2147483647 then
RT ← 2147483647
XER[SAT] ← 1
else if result < -2147483648 then
RT ← -2147483648
XER[SAT] ← 1
else
RT ← result
XER[OV] ← XER[SAT]