pdepd

Parallel Bits Deposit Doubleword

pdepd RA, RS, RB

Deposits bits from RS to RA under control of mask RB (Scalar).

Encoding

Binary Layout

31

0:5

RS

6:10

RA

11:15

RB

16:20

196

21:30

/

31

 

Format X-form

Opcode 0x7C000138

Extension Base

Operands

• RA
  Target
• RS
  Source
• RB
  Mask

Example

pdepd r4, r3, r5

Related

More in Base

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Deposits bits from RS into RA at positions specified by the mask RB (Power10 Scalar). Bits set to 1 in RB indicate positions where bits from RS are placed in RA; bits set to 0 in RB receive zeros. No CR, XER, or FPSCR fields are affected.

Operation

mask ← RB; result ← [0]*64; src_idx ← 0; for i in 0 to 63 do; if (mask[i] = 1) then result[i] ← RS[src_idx]; src_idx ← src_idx + 1; RA ← result;

Programming Note

The pdepd instruction is useful for selectively depositing bits from one register into another based on a mask. Ensure that the source and destination registers are properly aligned to avoid unexpected behavior. This instruction operates at user privilege level, but care must be taken with the mask to prevent unintended data corruption.