nmaclhw
Negative Multiply Accumulate Low Halfword
nmaclhw RT, RA, RB
Negate product of low halfwords and add to accumulator.
Encoding
Binary Layout
4
0:5
RT
6:10
RA
11:15
RB
16:20
430
21:30
0
31
Operands
-
RT
Acc/Dest -
RA
Src A -
RB
Src B
Example
nmaclhw r3, r4, r5
Related
More in Embedded
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
Multiplies the low halfwords (bits 16-31) of RA and RB as signed 16-bit integers, negates the 32-bit product, and adds it to RT, storing the result in RT. This is an embedded SPE instruction that performs signed halfword multiply-accumulate with negation. The overflow bit (XER[OV]) is set if the result overflows a 32-bit signed integer.
Operation
prod ← EXTS((RA[16:31]) * (RB[16:31]))
RT ← RT + (-prod)
if overflow then XER[OV] ← 1 else XER[OV] ← 0
XER[SO] ← XER[SO] | XER[OV]