pmxvf32gerpp

Prefixed Masked VSX Vector 32-bit Floating-Point GER (rank-1 update) Positive multiply, Positive accumulate

pmxvf32gerpp

Performs a prefixed masked VSX vector 32-bit floating-point GER rank-1 update with positive multiply and positive accumulate.

Details

The pmxvf32gerpp instruction performs a masked outer product (GER) of two VSX vectors of 32-bit floating-point values, updating an accumulator register with a rank-1 update. The multiply result is positive and is positively accumulated into the target accumulator. Masks specified in the prefix word control which elements participate in the computation. This is part of the Matrix-Multiply Assist (MMA) facility introduced in PowerISA v3.1.

Pseudocode Operation

Not available in specification

Programming Note

When Rc=1 (dot form), CR0 is updated with the signed comparison of the result against zero (LT, GT, EQ) and the current SO bit from XER.

Example

pmxvf32gerpp

Encoding

Binary Layout
59
0
AT
6
/
9
XA
11
XB
16
26
21
AX
29
BX
30
/
31
 
Format MMIRR:XX3-form
Opcode 0x3F800000
Extension MMA

Operands