xvsubdp

VSX Vector Subtract Double-Precision

xvsubdp XT, XA, XB

Subtracts the contents of two vector registers and places the result in a target vector register.

Details

For xvsubdp, each double-precision floating-point operand in the source vector registers is negated and added to the corresponding operand in the other source vector register. The results are normalized and rounded to double precision before being stored in the target vector register.

Pseudocode Operation

for i = {0, 1} do
    src1 <- VSR[XA][i]
    src2 <- VSR[XB][i]
    if src1 is NaN or src2 is NaN then
        v <- Q(src1) if src1 is NaN else Q(src2)
        vxsnan_flag <- 1 if either src1 or src2 is SNaN
    else if src1 is +Infinity and src2 is +Infinity then
        v <- +Infinity
        vxisi_flag <- 1
    else if src1 is -Infinity and src2 is -Infinity then
        v <- -Infinity
        vxisi_flag <- 1
    else if src1 is NZF and src2 is NZF then
        v <- S(src1, -src2)
    else if src1 is Zero and src2 is Zero then
        v <- Rezd
    else if src1 is +Zero and src2 is -Zero then
        v <- +Zero
    else if src1 is -Zero and src2 is +Zero then
        v <- -Zero
    else if src1 is NZF and src2 is Zero then
        v <- src1
    else if src1 is Zero and src2 is NZF then
        v <- -src2
    else if src1 is NZF and src2 is +Infinity then
        v <- -Infinity
    else if src1 is NZF and src2 is -Infinity then
        v <- +Infinity
    else if src1 is Zero and src2 is +Infinity then
        v <- -Infinity
    else if src1 is Zero and src2 is -Infinity then
        v <- +Infinity
    VSR[VX][i] <- v

Programming Note

The xvsubdp instruction performs element-wise subtraction of double-precision floating-point numbers from two source vectors, negating the operands before addition. Be cautious with NaN and infinity values as they can set flags (vxsnan_flag, vxisi_flag) and affect results. Ensure proper alignment for vector registers to avoid performance penalties.

Example

xvsubdp vs1, vs2, vs3

Encoding

Binary Layout

11110001

00000000

1000

Format XX3-form

Opcode 0xF0000068

Extension VSX

Registers Altered vxisi_flag, vxsnan_flag

Operands

XT
Target
XA
Src A
XB
Src B
VX
Target Vector Register