neg
Negate
neg RT, RA
Computes the two's complement negation of a register (0 - RT).
Encoding
Binary Layout
31
0:5
RT
6:10
RA
11:15
00000
16:20
OE
21
104
22:30
Rc
31
Operands
-
RT
Target Register -
RA
Source Register
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
Computes the two's complement negation (0 - RA) of the source register and stores the result in RT. If OE=1, sets OV and SO in XER on signed overflow (when RA=0x8000_0000_0000_0000). When Rc=1, updates CR0 based on the result.
Operation
result ← -(RA)
RT ← result
if OE = 1 then
if RA = 0x8000_0000_0000_0000 then
XER[OV] ← 1; XER[SO] ← 1
else
XER[OV] ← 0
if Rc = 1 then
CR0 ← record_result(result)
Programming Note
When Rc=1 (dot form), CR0 is updated with the signed comparison of the result against zero (LT, GT, EQ) and the current SO bit from XER.