pmxvf64gernn
Prefixed Masked VSX Vector 64-bit Floating-Point GER (rank-1 update) Negative multiply, Negative accumulate
Performs a prefixed masked VSX vector 64-bit floating-point GER (rank-1 update) with negative multiply and negative accumulate.
Details
The pmxvf64gernn instruction performs a prefixed masked VSX vector 64-bit floating-point outer product GER operation (rank-1 update) using negative multiply and negative accumulate. It is part of the MMA (Matrix-Multiply Assist) extension introduced in PowerISA v3.1. The instruction uses the MMIRR:XX3-form encoding and applies masking to control which elements participate in the computation. The result accumulates with negative sign on both the multiply and accumulate operations.
Programming Note
When Rc=1 (dot form), CR0 is updated with the signed comparison of the result against zero (LT, GT, EQ) and the current SO bit from XER.