xscvdpqp

VSX Scalar Convert Double-Precision to Quad-Precision format

xscvdpqp vD, vB

Converts a double-precision floating-point value to a quad-precision floating-point value.

Encoding

Binary Layout

0

0:5

VRT

6:10

VRB

11:20

11000000000000000000000000000000

21:31

 

Format X-form

Opcode 0xFC160688

Extension VSX

Operands

• vD
  Target (Quad)
• vB
  Source (Double)
• VRT
  Target Vector-Scalar Register
• VRB
  Source Vector-Scalar Register

Example

xscvdpqp v2, v3

// Promote Double to Quad.

Registers Altered

FPSCR.FPRF, FPSCR.FX, FPSCR.VXSNAN, FPSCR.FR, FPSCR.FI

Related

More in VSX

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Converts a double-precision floating-point value held in a VSX register to quad-precision format and stores the result in a VSX register pair. The conversion is exact since double-precision has fewer significant bits than quad-precision. This instruction requires VSX support and updates FPSCR with exception flags as needed.

Operation

FPR[vD:vD+1] ← convert_to_quad_precision(FPR[vB])
FPSCR ← updated with exception flags

Programming Note

This instruction is used to convert a double-precision floating-point number to a quad-precision format. Ensure that the VSX (Vector Scalar Extensions) are enabled in the MSR register, otherwise, an exception will be raised. Be cautious with signaling NaNs (SNaNs), as they are converted to quiet NaNs and may trigger exceptions based on the FPSCR settings.