xvcvsphp

Vector Convert Single-Precision to Half-Precision format XX2-form

xvcvsphp XT, XB

Converts each single-precision floating-point value in a vector register to half-precision and stores the result in another vector register.

Details

For xvcvsphp, each integer value i from 0 to 3, do the following. Let src be the single-precision floating-point value in word element i of VSR[XB]. If src is an SNaN, the result is the half-precision representation of that SNaN converted to a QNaN. Otherwise, if src is a QNaN, the result is the half-precision representation of that QNaN. Otherwise, if src is an Infinity, the result is the half-precision representation of Infinity with the same sign as src. Otherwise, if src is a Zero, the result is the half-precision representation of Zero with the same sign as src. Otherwise, the result is the half-precision representation of src rounded to half-precision using the rounding mode specified by RN. The result is zero-extended and placed into word element i of VSR[XT]. If a trap-enabled exception occurs, VSR[XT] is not modified.

Pseudocode Operation

if MSR.VSX=0 then VSX_Unavailable()
reset_flags()
do i = 0 to 3
    src ←bfp_CONVERT_FROM_BFP32(VSR[BX×32+B].word[i])
    rnd ←bfp_ROUND_TO_BFP16(FPSCR.RN,src)
    vresult.word[i].hword[0] ←0x0000
    vresult.word[i].hword[1] ← bfp16_CONVERT_FROM_BFP(rnd)
    if vxsnan_flag=1 then SetFX(FPSCR.VXSNAN)
    if ox_flag=1 then SetFX(FPSCR.OX)
    if ux_flag=1 then SetFX(FPSCR.UX)
    if xx_flag=1 then SetFX(FPSCR.XX)
ex_flag ←ex_flag | (FPSCR.VE & vxsnan_flag) | (FPSCR.OE & ox_flag) | (FPSCR.UE & ux_flag) | (FPSCR.XE & xx_flag)
end
Let XT be the value 32×TX + T.
Let XB be the value 32×BX + B.

Programming Note

This instruction converts single-precision floating-point values to half-precision format, handling special cases like NaNs and infinities. Ensure VSX is enabled; otherwise, a VSX_Unavailable exception occurs. The result is zero-extended into the destination vector register. Be cautious of rounding modes specified by FPSCR.RN and exceptions that may set flags in FPSCR.

Example

xvcvsphp vs1, vs3

Encoding

Binary Layout
T
0
25
6
B
11
475
16
BX
21
TX
30 31
 
Format XX2-form
Opcode 0xF00001B9
Extension VSX
Registers Altered FPSCR

Operands

  • XT
    Target
  • XB
    Source