vaddcuq

Vector Add Carryout Unsigned Quadword

vaddcuq vD, vA, vB

Adds the contents of two vector registers and writes the carry-out to another register.

Details

The instruction adds the unsigned integer values in VSR[VRA+32] and VSR[VRB+32], placing the result in VSR[VRT+32]. The carry-out is also written into VSR[VRT+32].

Pseudocode Operation

if MSR.VEC=0 then
    Vector_Unavailable()
src1 ←EXTZ(VSR[VRA+32])
src2 ←EXTZ(VSR[VRB+32])
sum  ←EXTZ(src1) + EXTZ(src2)
VSR[VRT+32] ←EXTZ128((src1 + src2) >> 128)

Programming Note

The Vector Add Unsigned Quadword instructions support efficient wide-integer addition.

Example

vaddcuq vd, va, vb

Encoding

Binary Layout
4
0
vD
6
vA
11
vB
16
1280
 
Format VX-form
Opcode 0x10000500
Extension VMX (AltiVec)
Registers Altered MSR

Operands

  • vD
    Target
  • vA
    Src A
  • vB
    Src B
  • VRT
    Target Vector Register
  • VRA
    Source Vector Register
  • VRB
    Source Vector Register