xsmincdp

VSX Scalar Minimum Type-C Double-Precision

xsmincdp XT, XA, XB

Computes the minimum of two double-precision floating-point numbers and handles NaNs according to Type-C rules.

Encoding

Binary Layout

0:5

6:10

11:15

16:20

153

21:31

Format XX3-form

Opcode 0xF0000440

Extension VSX

Operands

XT
Target
XA
Src A
XB
Src B

Example

xsmincdp vs1, vs2, vs3

Registers Altered

FPSCR (FX, VXSNAN)

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

If either src1 or src2 is a NaN, result is src2. Otherwise, if src1 is less than src2, result is src1. Otherwise, result is src2. The contents of doubleword 0 of VSR[XT] are set to the value result. The contents of doubleword 1 of VSR[XT] are set to 0.

Operation

if 'xsmincdp' then
    src1 <- VSR[XA]
    src2 <- VSR[XB]
    if src2 is QNaN or SNaN then
        fx(VXSNAN)
    else if src2 is -Infinity then
        T(src2) <- src2
    else if src2 is +Zero then
        T(src2) <- src2
    else if src2 is +NZF then
        T(src2) <- M(src1, src2)
    else if src2 is +Infinity then
        T(src2) <- src2
    VSR[XT] <- T(src2)

Programming Note

xsmincdp can be used to implement the C/C++/Java conditional operator (x<y)?x:y for single-precision and double-precision arguments. Previous versions of the architecture allowed the contents of doubleword 1 of the result register to be undefined. However, all processors that support this instruction write 0s into doubleword 1 of the result register, as is required by this version of the architecture.