xsnmaddmdp

VSX Scalar Negative Multiply-Add Type-M Double-Precision

xsnmaddmdp VRT, VRA, VRB, VRC

Computes the negative of the fused multiply-add of the double-precision floating-point operands, storing the result in the target scalar VSX register (Type-M: target register is used as the addend).

Details

The xsnmaddmdp instruction performs a scalar double-precision floating-point fused multiply-add of the values in the source VSX registers, then negates the result and places it in the target VSX register. In the Type-M form, the target register (T) provides the addend for the multiply-add operation, i.e., the result is -(VRA × VRB + VRT). The operation is performed as a single fused step without intermediate rounding of the product.

Pseudocode Operation

Not available in specification

Programming Note

Use xsnmaddmdp for performing a fused multiply-add operation on double-precision floating-point numbers, negating the result. Ensure that the target register provides the addend, and be aware that this instruction operates as a single fused step without intermediate rounding.

Example

xsnmaddmdp v1, v2, v3, v4

Encoding

Binary Layout
60
0
XT
6
XA
11
XB
16
1352
21
 
Format XX3-form
Opcode 0xF0000548
Extension VSX

Operands

  • VRT
    Target Vector Register
  • VRA
    Source Vector Register
  • VRB
    Source Vector Register
  • VRC
    Source Vector Register