xsnmsubqp

VSX Scalar Negative Multiply-Subtract Quad-Precision

xsnmsubqp VRT,VRA,VRB

Performs a negative multiply-subtract operation on quad-precision floating-point values.

Details

The xsnmsubqp instruction multiplies the contents of two registers (VRA and VRB), negates the result, adds it to another register (VRT), and stores the result back into VRT. The operation uses round-to-nearest mode by default.

Pseudocode Operation

if MSR.VSX=0 then VSX_Unavailable()
reset_xflags()
src1 ← bfp_CONVERT_FROM_BFP128(VSR[VRA+32])
src2 ← bfp_CONVERT_FROM_BFP128(VSR[VRT+32])
src3 ← bfp_CONVERT_FROM_BFP128(VSR[VRB+32])
v ← bfp_MULTIPLY_ADD(src1, src3, bfp_NEGATE(src2))
rnd ← bfp_ROUND_TO_BFP128(RO=0, FPSCR.RN, v)
result ← bfp128_CONVERT_FROM_BFP(rnd)
if vxsnan_flag=1 then SetFX(FPSCR.VXSNAN)
if vximz_flag=1 then SetFX(FPSCR.VXIMZ)
if vxisi_flag=1 then SetFX(FPSCR.VXISI)
if ox_flag=1 then SetFX(FPSCR.OX)
if ux_flag=1 then SetFX(FPSCR.UX)
if xx_flag=1 then SetFX(FPSCR.XX)
vx_flag ← vxsnan_flag | vximz_flag | vxisi_flag
ex_flag ← FPSCR.VE & vx_flag
if ex_flag=0 then do
    FPSCR.FPRF ← fprf_CLASS_BFP128(result)
    FPSCR.FR ← (vx_flag=0) & inc_flag
    FPSCR.FI ← (vx_flag=0) & xx_flag
end
VSR[VRT+32] ← result

Programming Note

The xsnmsubqp instruction is used for performing a scalar negative multiply-subtract operation on quad-precision floating-point numbers. Ensure that the VSX (Vector Scalar Extensions) are enabled in the MSR register to avoid exceptions. Be cautious of potential overflow and underflow conditions, as indicated by the exception flags in FPSCR. The result is rounded using round-to-nearest mode by default.

Example

xsnmsubqp v1, v2, v3

Encoding

Binary Layout
64
0
VRT
16
VRA
21
VRB
26
RO
31
 
Format X-form
Opcode 0xFC0003C8
Extension VSX
Registers Altered FPSCR, VXSNAN, VXIMZ, Vxisi, OX, UX, XX, FPRF, FR, FI

Operands

  • VRT
    Target Vector Register
  • VRA
    Source Vector Register
  • VRB
    Source Vector Register