xxbrw

Vector Byte-Reverse Word

xxbrw XT,XB

Reverses the bytes of each word in a vector register.

Encoding

Binary Layout

T

6:10

B

11:15

BX

16:20

TX

21:31

 

Format XX2-form

Opcode 0xF00F076C

Extension VSX

Operands

• XT
  Target Vector Register
• XB
  Source Vector Register

Example

xxbrw vs1, vs3

Registers Altered

MSR

Related

More in VSX

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Reverses the byte order within each 32-bit word of the source VSX vector register XB and places the result in XT. This is a VSX extension instruction with no effect on condition registers or status fields.

Operation

do i = 0 to 3
  word ← XB[i*32:(i+1)*32-1]
  XT[i*32:(i+1)*32-1] ← reverse_bytes(word)
enddo

Programming Note

The xxbrw instruction is used to reverse the byte order of each word in a vector register. Ensure that VSX (Vector Scalar Extensions) is enabled by checking and setting the appropriate bit in the MSR register. This instruction operates on 128-bit vector registers, processing four 32-bit words per operation. Be cautious of alignment requirements; source and target vectors must be properly aligned to avoid exceptions.