xxgenpcvwm
VSX Generate PCV from Word Mask
xxgenpcvwm XT, XB, IMM
Generates a permute control vector (PCV) based on the word mask in VSR[VRB+32] and stores it in VSR[XT].
Details
The instruction generates a permute control vector (PCV) based on the word mask in VSR[VRB+32] and stores it in VSR[XT]. The PCV is used to enable a left-indexed or right-indexed permute operation.
Pseudocode Operation
if MSR.VSX=0 then VSX_Unavailable()
Let TX be the value 32×TX + T.
if IMM=0b00000 then do // Big-Endian expansion
j ←0
do i = 0 to 3
if VSR[VRB+32].word[i].bit[0]=1 then do
VSR[XT].word[i].byte[0] ←4×j + 0x00
VSR[XT].word[i].byte[1] ←4×j + 0x01
VSR[XT].word[i].byte[2] ←4×j + 0x02
VSR[XT].word[i].byte[3] ←4×j + 0x03
j = j + 1
end
else do
VSR[XT].word[i].byte[0] ←4×i + 0x10
VSR[XT].word[i].byte[1] ←4×i + 0x11
VSR[XT].word[i].byte[2] ←4×i + 0x12
VSR[XT].word[i].byte[3] ←4×i + 0x13
end
end
end
else if IMM=0b00001 then do // Big-Endian compression
j ←0
do i = 0 to 3
if VSR[VRB+32].word[i].bit[0]=1 then do
VSR[XT].word[j].byte[1] ←4×i + 0x01
VSR[XT].word[j].byte[2] ←4×i + 0x02
VSR[XT].word[j].byte[3] ←4×i + 0x03
j ←j + 1
end
end
do i = j to 3
VSR[XT].word[i] ←0xUUUU_UUUU
end
end
else if IMM=0b00010 then do // Little-Endian expansion
j ←0
do i = 0 to 3
if VSR[VRB+32].word[3-i].bit[0]=1 then do
VSR[XT].word[3-i].byte[3] ←4×j + 0x00
VSR[XT].word[3-i].byte[2] ←4×j + 0x01
VSR[XT].word[3-i].byte[1] ←4×j + 0x02
VSR[XT].word[3-i].byte[0] ←4×j + 0x03
j ←j + 1
end
else do
VSR[XT].word[3-i].byte[3] ←4×i + 0x10
VSR[XT].word[3-i].byte[2] ←4×i + 0x11
VSR[XT].word[3-i].byte[1] ←4×i + 0x12
VSR[XT].word[3-i].byte[0] ←4×i + 0x13
end
end
end
else if IMM=0b00011 then do // Little-Endian compression
j ←0
do i = 0 to 3
if VSR[VRB+32].word[3-i].bit[0]=1 then do
VSR[XT].word[3-j].byte[3] ←4×i + 0x00
VSR[XT].word[3-j].byte[2] ←4×i + 0x01
VSR[XT].word[3-j].byte[1] ←4×i + 0x02
VSR[XT].word[3-j].byte[0] ←4×i + 0x03
j ←j + 1
end
end
do i = j to 3
VSR[XT].word[3-i] ←0xUUUU_UUUU
end
end
Programming Note
The instruction generates a permute control vector (PCV) based on the word mask in VSR[VRB+32] and stores it in VSR[XT]. The PCV is used to enable a left-indexed or right-indexed permute operation.
Example
xxgenpcvwm vs1, vs3, 1
Encoding
Binary Layout
60
0
XT
6
IMM
11
XB
16
948
21
Operands
-
XT
Target -
XB
Source -
IMM
Mask -
VRB
Source Vector-Specific Register