xscpsgndp
VSX Scalar Copy Sign Double-Precision
xscpsgndp XT,XA,XB
Copies the sign of a double-precision floating-point value from one register to another.
Encoding
Binary Layout
176
0:5
AX
6:10
BX
11:15
TX
16:20
T
21:28
A
29
B
30:31
Operands
-
XT
Target Vector-Scalar Register -
XA
Source Vector-Scalar Register for Sign Bit -
XB
Source Vector-Scalar Register for Magnitude
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
Copies the sign bit from the double-precision floating-point value in VSR[XA] to the double-precision value in VSR[XB], placing the result in VSR[XT]. The magnitude of the result comes from XB and the sign comes from XA. FPSCR is not affected; this instruction operates on the scalar element of the VSX register.
Operation
XT[0] ← XA[0]
XT[1:63] ← XB[1:63]Programming Note
This instruction can be used to operate on single-precision source operands.
Previous versions of the architecture allowed the contents of doubleword 1 of the result register to be undefined. However, all processors that support this instruction write 0s into doubleword 1 of the result register, as is required by this version of the architecture.