xscvdpsxds

VSX Scalar Convert Double-Precision to Signed Doubleword with Round to Zero

xscvdpsxds XT, XB

Converts a double-precision floating-point value to a signed doubleword integer using round towards zero.

Details

The instruction converts the double-precision floating-point value in doubleword element 0 of VSR[XB] to a signed doubleword integer. The result is placed into doubleword element 0 of VSR[XT], and doubleword element 1 of VSR[XT] is set to 0.

Pseudocode Operation

if src ≤ Nmin - 1 then
    T(Nmin)
    fr(0)
    fi(0)
    fx(VXCVI)
    if error() then invoke system error handler
else if Nmin - 1 < src < Nmin then
    T(Nmin)
    fr(0)
    fi(1)
    fx(XX)
    if error() then invoke system error handler
else if src = Nmin then
    T(Nmin)
    fr(0)
    fi(0)
else if Nmin < src < Nmax then
    T(f2i(trunc(src)))
    fr(0)
    fi(1)
    fx(XX)
    if error() then invoke system error handler
else if src = Nmax then
    T(Nmax)
    fr(0)
    fi(0)
else if Nmax < src < Nmax + 1 then
    T(Nmax)
    fr(0)
    fi(1)
    fx(XX)
    if error() then invoke system error handler
else if src ≥ Nmax + 1 then
    T(Nmin)
    fr(0)
    fi(0)
    fx(VXCVI)
    if error() then invoke system error handler
else if src is a QNaN then
    T(Nmin)
    fr(0)
    fi(0)
    fx(VXCVI)
    if error() then invoke system error handler
else if src is a SNaN then
    T(Nmin)
    fr(0)
    fi(0)
    fx(VXCVI)
    fx(VXSNAN)
    if error() then invoke system error handler

Programming Note

['xscvdpsxds rounds using Round towards Zero rounding mode. For other rounding modes, software must use a Round to Double-Precision Integer instruction that corresponds to the desired rounding mode.', 'Previous versions of the architecture allowed the contents of doubleword 1 of the result register to be undefined. However, all processors that support this instruction write 0s into doubleword 1 of the result register, as is required by this version of the architecture.']

Example

xscvdpsxds vs1, vs3

Encoding

Binary Layout
60
0
T
1
B
5
344
6
BX
16
TX
21
 
Format XX2-form
Opcode 0xF0000158
Extension VSX
Registers Altered FPSCR, VSR[XT]

Operands

  • XT
    Target
  • XB
    Source