dccci
Data Cache Congruence Class Invalidate
dccci RA, RB
Invalidates a congruence class in the data cache (Embedded).
Encoding
Binary Layout
31
0:5
/
6:10
RA
11:15
RB
16:20
454
21:30
/
31
Operands
-
RA
Base -
RB
Index
Example
dccci r4, r5
Related
More in Embedded
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
Invalidates a congruence class in the data cache at the address formed by RA + RB. This is an embedded cache-management instruction with no guaranteed semantics on all implementations; behavior is implementation-dependent and may require supervisor privilege. The instruction has no effect on data in higher-level caches or main memory.
Operation
addr ← (RA) + (RB)
Invalidate data cache congruence class at addr