and

AND

and RT,RS,RB

Performs a bitwise AND operation on the contents of two registers and places the result into another register.

Encoding

Binary Layout

31

0:5

RS

6:10

RA

11:15

RB

16:20

28

21:30

Rc

31

 

Format X-form

Opcode 0x7C000038

Extension Base

Operands

• RA
  Target Register
• RS
  Source Register 1
• RB
  Source Register 2
• RT
  Target General Purpose Register

Example

and r3, r4, r5

// r3 = r4 & r5

Registers Altered

CR0

Related

More in Base

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

The contents of register RS are ANDed with the contents of register RB and the result is placed into register RA.

Operation

if 'and' then
    RT <- (RS) & (RB)
else if 'and.' then
    RT <- (RS) & (RB)

Programming Note

Some forms of and Rx, Rx, Rx provide special functions; see Section 11.3 of Book III.