addg6s

Add and Generate Sixes

addg6s RT,RA,RB

Adds the contents of two registers and generates sixes based on carry bits.

Details

The addg6s instruction adds the contents of register RA and RB. Sixteen carry bits are produced, one for each carry out of decimal position n (bit position 4×n). A doubleword is composed from these 16 carry bits and placed into RT. The doubleword consists of a decimal six (0b0110) in every decimal digit position for which the corresponding carry bit is 0, and a zero (0b0000) in every position for which the corresponding carry bit is 1.

Pseudocode Operation

do i = 0 to 15
    dci ← carry_out(RA4×i:63 + RB4×i:63)
c ← 4(dc0) || 4(dc1) || ... || 4(dc15)
RT ← (¬c) & 0x6666_6666_6666_6666

Programming Note

addg6s can be used to add or subtract two BCD operands. In these examples it is assumed that r0 contains 0x666...666. (BCD data formats are described in Section 5.3.)

Example

addg6s r3, r4, r5

Encoding

Binary Layout
18
0
LI
6
AA
30
LK
31
 
Format XO-form
Opcode 0x7C000094
Extension Base

Operands

  • RT
    Target General Purpose Register
  • RA
    Source General Purpose Register
  • RB
    Source General Purpose Register