ps_madd

Paired Single Multiply-Add

ps_madd FRT, FRA, FRC, FRB

Multiply-Add on paired singles.

Details

Performs multiply-add on two pairs of single-precision floating-point values element-wise, computing FRA × FRC + FRB and storing the result in FRT. All three source registers contribute to the operation, with each element pair computed independently. May set FPSCR status flags if exceptions occur.

Pseudocode Operation

FPR[FRT].upper ← FPR[FRA].upper × FPR[FRC].upper + FPR[FRB].upper
FPR[FRT].lower ← FPR[FRA].lower × FPR[FRC].lower + FPR[FRB].lower

Example

ps_madd f1, f2, f4, f3

Encoding

Binary Layout
60
0
FRT
6
FRA
11
FRB
16
FRC
21
29
26
 
Format A-form
Opcode 0xF000001D
Extension VMX (AltiVec)

Operands

  • FRT
    Target
  • FRA
    Src A
  • FRC
    Src C
  • FRB
    Src B