stvebx

Store Vector Element Byte Indexed

stvebx VRS,RA,RB

Stores a byte element from a vector register into memory.

Details

The Store Vector Element Byte Indexed instruction stores the specified byte element from VSR[VRS+32] into the aligned byte in storage addressed by EA. The address is calculated as (RA|0) + RB, and the byte to store is determined by bits 60:63 of EA.

Pseudocode Operation

if MSR.VEC=0 then
    Vector_Unavailable()
EA ←((RA=0) ? 0 : GPR[RA]) + GPR[RB]
eb ←EA.bit[60:63]
if Big-Endian byte ordering then
    MEM(EA,1) ←VSR[VRS+32].byte[eb]
else
    MEM(EA,1) ←VSR[VRS+32].byte[15-eb]

Programming Note

Unless bits 60:63 of the address are known to match the byte offset of the subject byte element in VSR[VRS+32], software should use Vector Splat to splat the subject byte element before performing the store.

Example

stvebx v1, r4, r5

Encoding

Binary Layout
0
0
VRS
6
RA
11
RB
16
 
Format X-form
Opcode 0x7C00002E
Extension VMX (AltiVec)
Registers Altered MSR

Operands

  • VRS
    Vector Register
  • RA
    Source General Purpose Register
  • RB
    Source General Purpose Register