vmrglb

Vector Merge Low Byte

vmrglb vD, vA, vB

Interleaves low-order bytes.

Details

The Vector Merge Low Byte instruction (vmrglb) merges the low bytes of two vector registers into a single vector register. It takes three operands: VRT (target), VRA, and VRB. For each byte position from 0 to 7, it copies the byte from VRA into the corresponding halfword in VRT if the byte index is even, and from VRB if the byte index is odd.

Pseudocode Operation

if MSR.VEC=0 then Vector_Unavailable()
do i = 0 to 7
   if i mod 2 = 0 then
      VSR[VRT+32].hword[i/2].byte[0] ← VSR[VRA+32].byte[i]
   else
      VSR[VRT+32].hword[(i-1)/2].byte[1] ← VSR[VRB+32].byte[i]
end

Programming Note

The vmrglb instruction is useful for merging data from two vectors by alternating bytes into a third vector. Ensure that the target and source registers are properly aligned to avoid unexpected behavior. This instruction requires the Vector Facility to be enabled in the MSR register; otherwise, it will raise an exception. Performance may vary based on the specific implementation and alignment of the data.

Example

vmrglb vd, va, vb

Encoding

Binary Layout
4
0
vD
6
vA
11
vB
16
268
21
 
Format VX-form
Opcode 0x1000010C
Extension VMX (AltiVec)
Registers Altered MSR

Operands

  • vD
    Target
  • vA
    Src A
  • vB
    Src B