lxvpx

Load VSX Vector Paired Indexed X-form

lxvpx XTp,RA,RB

Loads a vector from memory into two VSR registers.

Details

The contents of the octword in storage at address EA are placed into load_data. The order of bytes in load_data depends on the byte ordering (Little-Endian or Big-Endian). Bits 0-127 of load_data are placed into VSR[XTp], and bits 128-255 of load_data are placed into VSR[XTp+1].

Pseudocode Operation

if MSR.VSX=0 then
    VSX_Unavailable()
EA ←((RA=0) ? 0 : GPR[RA]) + GPR[RB]
load_data ←MEM(EA,32)
VSR[32×TX+2×Tp]   ←load_data.bit[  0:127]
VSR[32×TX+2×Tp+1] ←load_data.bit[128:255]

Programming Note

For best performance, EA should be word-aligned.

Example

lxvpx vs2, r4, r5

Encoding

Binary Layout
10011000
0
Tp
6
TX
10
RA
15
RB
20
 
Format X-form
Opcode 0x7C00029A
Extension VSX

Operands

  • XTp
    Target Vector-Specific Register (VSR) index
  • RA
    Source General Purpose Register
  • RB
    Source General Purpose Register