xvnmsubmdp

VSX Vector Negative Multiply-Subtract Type-M Double-Precision

xvnmsubmdp VRT, VRA, VRB, VRC

Performs a negative multiply-subtract operation on double-precision floating-point values.

Details

For each double-precision floating-point element, the instruction multiplies the corresponding elements of VRA and VRT, subtracts the corresponding element of VRB from the product, negates the result, and stores it in VRT. This is the Type-M variant, meaning VRT serves as both a source operand (multiplicand) and the destination register. The operation is performed in double-precision floating-point arithmetic with IEEE 754 rounding rules applied.

Pseudocode Operation

do i = 0 to 1
  VRT.dword[i] ← RoundFP64(-(FP64(VRA.dword[i]) × FP64(VRT.dword[i])) - FP64(VRB.dword[i]))

Programming Note

This instruction is commonly used in scenarios requiring complex floating-point arithmetic operations, such as in scientific computations or graphics processing. Be cautious of potential overflow or underflow conditions due to the nature of double-precision multiplication and subtraction. Ensure that VRT is properly aligned for optimal performance, as misalignment can lead to significant slowdowns. This instruction operates at user privilege level but may generate exceptions if invalid operations occur, such as division by zero or NaN results.

Example

xvnmsubmdp v1, v2, v3, v4

Encoding

Binary Layout
60
0
XT
6
XA
11
XB
16
1992
21
 
Format XX3-form
Opcode 0xF00007C8
Extension VSX
Registers Altered FPSCR

Operands

  • VRT
    Target Vector Register
  • VRA
    Source Vector Register
  • VRB
    Source Vector Register
  • VRC
    Source Vector Register