xsxsigqp

VSX Scalar Extract Significand Quad-Precision

xsxsigqp VRT, VRA

Extracts the significand of a quad-precision floating-point number.

Encoding

Binary Layout

111111

0:5

VRT

6:8

10010

9:10

VRA

11:15

11001

16:20

00100

21:30

Rc

31

 

Format X-form

Opcode 0xFC120648

Extension Floating-Point

Operands

• VRT
  Target Vector Register
• VRA
  Source Vector Register

Example

xsxsigqp v1, v2

Related

More in Floating-Point

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Extracts the significand (mantissa) field from a quad-precision (128-bit) floating-point value in the source VSX register and places the extracted significand into the target VSX register. The result preserves the sign of the original significand and right-justifies it within a 64-bit field. The instruction does not modify condition registers or exception flags.

Operation

significand ← extract_significand(VRA[0:127])
VRT[0:127] ← sign_extend_to_128bit(significand)

Programming Note

When Rc=1, CR1 is set from the FPSCR[FX, FEX, VX, OX] bits immediately after the operation completes.