frsp

Floating Round to Single-Precision

frsp FRT,FRB
frsp. FRT,FRB

Rounds the contents of a floating-point register to single-precision.

Details

The floating-point operand in register FRB is rounded to single-precision using the rounding mode specified by RN and placed into register FRT.

Pseudocode Operation

if (FRB)1:11 < 897 and (FRB)1:63 > 0 then
    if FPSCRUE = 0 then goto Disabled Exponent Underflow
    if FPSCRUE = 1 then goto Enabled Exponent Underflow
end

if (FRB)1:11 > 1150 and (FRB)1:11 < 2047 then
    if FPSCROE = 0 then goto Disabled Exponent Overflow
    if FPSCROE = 1 then goto Enabled Exponent Overflow
end

if (FRB)1:11 > 896 and (FRB)1:11 < 1151 then goto Normal Operand

if (FRB)1:63 = 0 then goto Zero Operand

if (FRB)1:11 = 2047 then
    if (FRB)12:63 = 0 then goto Infinity Operand
    if (FRB)12 = 1 then goto QNaN Operand
    if (FRB)12 = 0 and (FRB)13:63 > 0 then goto SNaN Operand
end

Disabled Exponent Underflow:
    sign ←(FRB)0
    if (FRB)1:11 = 0 then
        exp ←−1022
        frac0:52 ←0b0 || (FRB)12:63
    end
    if (FRB)1:11 > 0 then
        exp ←(FRB)1:11 −1023
        frac0:52 ←0b1 || (FRB)12:63
    end
    Denormalize operand:
        G || R || X ←0b000
        do while exp < −126
            exp ←exp + 1
            frac0:52 || G || R || X ←0b0 || frac0:52 || G || (R | X)
        end
    FPSCRUX ←(frac24:52 || G || R || X) > 0
    Round Single(sign,exp,frac0:52,G,R,X)
    FPSCRXX ←FPSCRXX | FPSCRFI

Programming Note

The frsp instruction rounds a double-precision floating-point number to single precision. It handles various cases like underflow, overflow, and NaNs, setting appropriate flags in the FPSCR register. Ensure that the input register FRB is correctly set before calling this instruction.

Example

frsp f1, f3

Encoding

Binary Layout
63
0
FRT
6
/
11
FRB
16
12
21
Rc
31
 
Format X-form
Opcode 0xFC000018
Extension Floating-Point
Registers Altered FPSCR (FPRF FR FI FX OX UX XX VXSNAN), CR1

Operands

  • FRT
    Target
  • FRB
    Source