vctzd

Vector Count Trailing Zeros Doubleword

vctzd vD, vB

Counts the number of consecutive zero bits starting at bit 63 of each doubleword element in VSR[VRB+32] and places the result into VSR[VRT+32].

Details

For vctzd, for each integer value i from 0 to 1, a count of the number of consecutive zero bits starting at bit 63 of doubleword element i of VSR[VRB+32] is placed into doubleword element i of VSR[VRT+32]. This number ranges from 0 to 64, inclusive.

Pseudocode Operation

if MSR.VEC=0 then
    Vector_Unavailable()
do i = 0 to 1
    n ←0
    do while n < 64
        if VSR[VRB+32].dword[i].bit[63-n] = 0b1 then
            leave
        n ←n + 1
    end
    VSR[VRT+32].dword[i] ←CHOP64(EXTZ(n))
end

Programming Note

The vctzd instruction counts trailing zeros in each doubleword of the input vector. Ensure that the Vector Facility is enabled by checking and setting the MSR.VEC bit. This instruction operates on 64-bit elements, so input vectors must be aligned accordingly. The result is a count from 0 to 64 for each element, indicating the number of trailing zeros.

Example

vctzd vd, vb

Encoding

Binary Layout
4
0
vD
6
0
11
vB
16
1986
 
Format VX-form
Opcode 0x100007C2
Extension VMX (AltiVec)
Registers Altered MSR

Operands

  • vD
    Target
  • vB
    Source
  • VRT
    Target Vector Register
  • VRB
    Source Vector Register