xvi8ger4spp
VSX Vector 8-bit Signed/Unsigned Integer GER (rank-4 update) with Saturation Positive multiply, Positive accumulate
xvi8ger4spp AT,XA,XB
Performs a vector-scalar operation on 8-bit signed and unsigned integers with saturation.
Encoding
Binary Layout
0
0:5
AT
6:10
XA
11:15
XB
16:20
16
21:25
21
26:28
29
29
30
30
31
31
Operands
-
AT
Target Vector Register -
XA
Source Vector Register -
XB
Source Vector Register
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
Performs a 4×4 generalized outer product (GER) on 8-bit signed/unsigned integers from XA and XB, accumulating the products into the 32-bit accumulator AT with saturation applied. Results with positive products and positive accumulation ('pp' suffix) are saturated to the signed 32-bit range. This is a VSX instruction requiring the MMA category support.
Operation
acc ← AT
for i in 0 to 3 do
for j in 0 to 3 do
a ← sign_extend(XA[i*8:(i+1)*8-1], 8)
b ← sign_extend(XB[j*8:(j+1)*8-1], 8)
prod ← a × b
acc[i*32+j*8:(i*32+j*8+31)] ← SATURATE_S32(acc[i*32+j*8:(i*32+j*8+31)] + prod)
end for
end for
AT ← acc
Programming Note
This instruction is used for performing vector-scalar operations on 8-bit signed and unsigned integers, multiplying corresponding elements of two vectors and accumulating the results into an accumulator with saturation handling. Ensure that the VSX (Vector Scalar Extensions) are enabled in the MSR register to avoid a 'VSX_Unavailable' exception. The operation involves multiple steps of multiplication and accumulation, which can be computationally intensive; consider optimizing vector sizes and operations for performance.