xvnmaddadp

Vector Negative Multiply-Add Type-A Double-Precision

xvnmaddadp XT,XA,XB

Performs a negative multiply-add operation on double-precision floating-point elements.

Encoding

Binary Layout

0:5

6:10

11:15

16:20

1800

21:31

Format XX3-form

Opcode 0xF0000708

Extension VSX

Operands

XT
Target Vector Register
XA
Source Vector Register
XB
Source Vector Register

Example

xvnmaddadp vs1, vs2, vs3

Registers Altered

FPSCR, VXSNAN, VXIMZ, Vxisi, OX, UX, XX

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

For xvnmaddadp, for each integer value i from 0 to 1, the following operations are performed: src1 is multiplied by src3, then src2 is added to the product. The result is normalized and rounded to double precision using the rounding mode specified by RN. The final result is negated and placed into VSR[XT].

Operation

if MSR.VSX=0 then VSX_Unavailable()

ex_flag ←0b0
do i = 0 to 1
    reset_xflags()
    src1 ←bfp_CONVERT_FROM_BFP64(VSR[32×AX+A].dword[i])
    src2 ←bfp_CONVERT_FROM_BFP64(VSR[32×TX+T].dword[i])
    src3 ←bfp_CONVERT_FROM_BFP64(VSR[32×BX+B].dword[i])

    v   ←bfp_MULTIPLY_ADD(src1,src3,src2)
    rnd ←bfp_NEGATE(bfp_ROUND_TO_BFP64(FPSCR.RN,v))
    vresult.dword[i] ←bfp64_CONVERT_FROM_BFP(rnd)

    if vxsnan_flag=1 then SetFX(FPSCR.VXSNAN)
    if vximz_flag=1 then SetFX(FPSCR.VXIMZ)
    if vxisi_flag=1 then SetFX(FPSCR.VXISI)
    if ox_flag=1 then SetFX(FPSCR.OX)
    if ux_flag=1 then SetFX(FPSCR.UX)
    if xx_flag=1 then SetFX(FPSCR.XX)

    ex_flag ←ex_flag | (FPSCR.VE & vxsnan_flag) | (FPSCR.VE & vximz_flag) | (FPSCR.VE & vxisi_flag) | (FPSCR.OE & ox_flag) | (FPSCR.UE & ux_flag) | (FPSCR.XE & xx_flag)
end

if ex_flag=0 then VSR[32×TX+T] ←vresult

Programming Note

This instruction performs vectorized negative multiply-add operations on double-precision floating-point numbers. Ensure that the VSX (Vector Scalar Extensions) are enabled in the MSR register to avoid exceptions. Be cautious with rounding modes specified by FPSCR.RN, as they can affect precision and performance. Handle exceptions properly by checking the VXSNAN, VXIMZ, Vxisi, OX, UX, and XX flags after execution.