vcmpgtsb

Vector Compare Greater Than Signed Byte

vcmpgtsb VRT,VRA,VRB
vcmpgtsb. VRT,VRA,VRB

Compares each byte of two vector registers and sets the corresponding result byte to all 1s if the signed byte in the first source register is greater than the signed byte in the second source register, otherwise sets it to all 0s.

Details

For vcmpgtsb, each byte of VSR[VRA+32] is compared with the corresponding byte of VSR[VRB+32]. If the signed byte in VSR[VRA+32] is greater than the signed byte in VSR[VRB+32], then the corresponding byte in VSR[VRT+32] is set to all 1s (0xFF). Otherwise, it is set to all 0s (0x00).

Pseudocode Operation

if MSR.VEC=0 then Vector_Unavailable()
all_true ←1
all_false ←1
do i = 0 to 15
    src1 ←EXTS(VSR[VRA+32].byte[i])
    src2 ←EXTS(VSR[VRB+32].byte[i])
    if src1 > src2 then do
        VSR[VRT+32].byte[i] ←0xFF
        all_false ←0
    end
    else do
        VSR[VRT+32].byte[i] ←0x00
        all_true ←0
    end
end
if Rc=1 then
    CR.field[6] ←all_true || 0b0 || all_false || 0b0

Programming Note

When Rc=1, CR1 is set from the FPSCR[FX, FEX, VX, OX] bits immediately after the operation completes.

Extended Mnemonics

Extended Mnemonic Equivalent Instruction

Example

vcmpgtsb v1, v2, v3

Encoding

Binary Layout
0
0
VRT
6
VRA
11
VRB
16
Rc
21
 
Format VC-form
Opcode 0x10000306
Extension VMX (AltiVec)
Registers Altered CR0, XER

Operands

  • vD
    Target
  • vA
    Src A
  • vB
    Src B
  • VRT
    Target Vector Register
  • VRA
    Source Vector Register
  • VRB
    Source Vector Register