stxvp

Store VSX Vector Pair

stxvp XS, DQ(RA)

Stores a pair of VSX vector registers to memory.

Encoding

Binary Layout

61

0:5

XS

6:10

RA

11:15

DQ

16:27

4

28:31

 

Format DQ-form

Opcode 0x18000001

Extension VSX

Operands

• XS
  Source Even VSR
• DQ
  Offset
• RA
  Base
• XSp
  VSX Vector Register Pair
• disp
  Displacement Value

Example

stxvp vs1, 0(r4)

Registers Altered

MSR

Related

More in VSX

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

For stxvp, the effective address (EA) is the sum of the integer value in GPR[RA] or 0 if RA=0 and the value DQ||0b0000, sign-extended to 64 bits. The contents of VSR[XSp] concatenated with VSR[XSp+1] are stored into memory at address EA.

Operation

if MSR.VSX=0 then VSX_Unavailable()
EAbase ←(RA=0) ? 0 : GPR[RA]
EAdisp ←EXTS64(DQ || 0b0000)
EA ←EAbase + EAdisp
store_data.bit[128:255] ←VSR[32×SX+2×Sp+1]
MEM(EA,32) ←store_data

Programming Note

For best performance, EA should be word-aligned.