stxvrhx

Store VSX Vector Rightmost Halfword Indexed X-form

stxvrhx XS,RA,RB

Stores the rightmost halfword of a VSX vector element to memory.

Encoding

Binary Layout

0

0:5

S

6:10

RA

11:15

RB

16:20

16

21:30

SX

31

 

Format X-form

Opcode 0x7C00015A

Extension VSX

Operands

• XS
  VSX Vector Register
• RA
  General Purpose Register (Base Address)
• RB
  General Purpose Register (Index)

Example

stxvrhx vs1, r4, r5

Related

More in VSX

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Stores the rightmost halfword (least significant 16 bits) of the first double-precision element in a VSX vector to memory using indexed addressing. The effective address is computed as (RA|0) + RB. This VSX instruction does not affect condition registers or status flags.

Operation

EA ← (RA|0) + RB
[EA:EA+1] ← VSR[XS][48:63]

Programming Note

The stxvrhx instruction stores the rightmost halfword of a VSX vector element into memory. Ensure that the VSX facility is enabled (MSR.VSX=1); otherwise, a VSX_Unavailable exception will occur. The effective address is calculated by adding GPR[RA] and GPR[RB], so ensure these registers contain valid addresses. This instruction operates at user privilege level.