xscmpodp

VSX Scalar Compare Ordered Double-Precision

xscmpodp BF, XA, XB

Compares two double-precision floating-point values and sets the condition register based on the comparison.

Details

Performs an ordered comparison of the double-precision floating-point values in XA and XB, setting the specified CR field (BF) with the comparison result: less-than, greater-than, equal, or unordered. If either operand is a signaling NaN, an invalid operation exception is raised in FPSCR. Quiet NaNs result in an unordered condition.

Pseudocode Operation

if isnan(XA[0:63]) | isnan(XB[0:63]) then
  FPSCR[VXVC] ← 1
  CR[BF*4:BF*4+3] ← 0001
elsif XA[0:63] < XB[0:63] then
  CR[BF*4:BF*4+3] ← 1000
elsif XA[0:63] > XB[0:63] then
  CR[BF*4:BF*4+3] ← 0100
else
  CR[BF*4:BF*4+3] ← 0010

Programming Note

This instruction can be used to operate on single-precision source operands.

Example

xscmpodp cr0, vs2, vs3

Encoding

Binary Layout
60
0
BF
6
/
9
XA
11
XB
16
43
21
 
Format XX3-form
Opcode 0xF0000158
Extension VSX
Registers Altered CR, FPSCR, VXSNAN, VXVC

Operands

  • BF
    CR Field
  • XA
    Src A
  • XB
    Src B