xvcmpeqdp

VSX Vector Compare Equal Double-Precision

xvcmpeqdp XT,XA,XB
xvcmpeqdp. XT,XA,XB

Compares two double-precision floating-point values in vector registers and sets the target register based on equality.

Details

For xvcmpeqdp, each element of the source vectors VSR[XA] and VSR[XB] is compared. The result is stored in VSR[XT]. If Rc=1, CR field 6 is updated with comparison results.

Pseudocode Operation

if MSR.VSX=0 then VSX_Unavailable()
ex_flag ←0b0
all_false ←0b1
all_true ←0b1
do i = 0 to 1
    reset_xflags()
    src1 ←bfp_CONVERT_FROM_BFP64(VSR[32×AX+A].dword[i])
    src2 ←bfp_CONVERT_FROM_BFP64(VSR[32×BX+B].dword[i])
    vxsnan_flag ←IsSNaN(src1) | IsSNaN(src2)
    if src1 = src2 then do
        all_false ←0b0
    end
    else do
        vresult.dword[i] ←0x0000_0000_0000_0000
        all_true ←0b0
    end
    if vxsnan_flag=1 then SetFX(FPSCR.VXSNAN)
    ex_flag ←ex_flag | (FPSCR.VE & vxsnan_flag)
end
if Rc=1 then do
    if vex_flag=0 then
        CR[6] ←all_true || 0b0 || all_false || 0b0
    else
        CR[6] ←0bUUUU
end

Programming Note

When Rc=1, CR1 is set from the FPSCR[FX, FEX, VX, OX] bits immediately after the operation completes.

Example

xvcmpeqdp vs1, vs2, vs3

Encoding

Binary Layout
T
6
A
11
B
16
Rc
21
AX
29
BX
30
TX
31
 
Format XX3-form
Opcode 0xF0000063
Extension VSX
Registers Altered CR, FPSCR

Operands

  • XT
    Target
  • XA
    Src A
  • XB
    Src B